IRS2153D

Product Summary

The IRS2153D is based on the popular IR2153 self-oscillating half-bridge gate driver IC using a more advanced silicon platform, and incorporates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. HVIC and latch immune CMOS technologies of the IRS2153D enable rugged monolithic construction. The output of the IRS2153D features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is achieved with low di/dt peak of the gate drivers.

Parametrics

IRS2153D absolute maximum ratings: (1) High Side Floating Supply Voltage VB: -0.3V to 625V; (2) High Side Floating Supply Offset Voltage VS: VB -25V, VB+0.3V; (3) High-Side Floating Output Voltage VHO: VS -0.3V, VB +0.3V; (4) Low-Side Output Voltage VLO: -0.3V, VCC+0.3V; (5) RT Pin Current, IRT: -5mA, 5mA; (6) RT Pin Voltage : -0.3V, Vcc + 0.3V; (7) CT Pin Voltage VCT: -0.3V, VCC +0.3V; (8) Supply Current Icc: 20mA; (9) Maximum allowable current at LO and HO due to external power transistor Miller effect IOMX: -500mA to 500ma; (10) Allowable Offset Voltage Slew Rate, dVs/dt: -50 to 50V/ns; (11) Maximum Power Dissipation@TA≤+25°C, 8-Pin DIP: 1.0W; (12) Maximum Power Dissipation@TA≤+25°C, 8-PIN SOIC: 0.625W; (13) Thermal Resistance, Junction to Ambient, 8-Pin DIP RθJA: 85°C/W; (14) Thermal Resistance, Junction to Ambient, 8-Pin SOIC RθJA: 128°C/W; (15) Junction Temperature Tj: -55 to 150°C; (16) Storage Temperature Ts: -55 to 150°C; (17) Lead Temperature (Soldering, 10 seconds) TL: 300°C.

Features

IRS2153D features: (1) Integrated 600V Half-Bridge Gate Driver; (2) CT, RT programmable oscillator; (3) 15.4V Zener Clamp on VCC; (4) Micropower Startup; (5) Non-latched shutdown on CT pin (1/6th VCC) ; (6) Internal bootstrap FET; (7) Excellent Latch Immunity on All Inputs & Outputs; (8) +/- 50V/ns dV/dt immunity; (9) ESD Protection on All Pins; (10) 8-lead SOIC or PDIP package; (11) 1.1 usec (typ.) internal deadtime.

Diagrams