KSZ8995MAI

Product Summary

The KSZ8995MAI is a highly integrated Layer-2 managed switch with optimized BOM (Bill of Materials) cost for low port count, cost-sensitive 10/100Mbps switch systems. It also provides an extensive feature set such as tag/port-based VLAN, QoS(Quality of Service) priority, management, MIB counters, dual MII interfaces and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications. The KSZ8995MAI contains five 10/100 transceivers with patented mixed-signal low-power technology, five MAC (Media Access Control) units, a high-speed non-blocking switch fabric, a dedicated address look-up engine, and an on-chip frame buffer memory. All PHY units support 10BaseT and 100BaseTX. In addition, two of the PHY units support 100BaseFX (Ports 4 and 5).

Parametrics

Absolute maximum ratings:(1)Supply Voltage (VDDAR, VDDAP, VDDC, VDDAT): –0.5V to +2.4V; (2)Supply Voltage (VDDIO): –0.5V to +4.0V; (3)Input Voltage: –0.5V to +4.0V; (4)Output Voltage: –0.5V to +4.0V; (5)Lead Temperature (soldering, 10 sec.): 270°C; (6)Storage Temperature (TS): –55°C to +150°C; (7)Supply Voltage (VDDAR, VDDAP, VDDC): +1.7V to +1.9V; (8)Supply Voltage (VDDAT): +2.4V to +2.6V; (9)Supply Voltage (VDDIO): +3.0 to +3.6; (10)Ambient Temperature (TA) Commercial: –0°C to +70°C; (11)Industrial: –40°C to +85°C; (12)Package Thermal Resistance PQFP (θJA) No Air Flow: 59.47°C/W.

Features

Features: (1)Integrated switch with five MACs and five Fast Ethernet transceivers fully compliant to IEEE 802.3u standard; (2)Shared memory based switch fabric with fully nonblocking configuration; (3)1.4Gbps high-performance memory bandwidth; (4)10BaseT, 100BaseTX and 100BaseFX modes (FX in Ports 4 and 5); (5)Dual MII configuration: MII-Switch (MAC or PHY mode MII) and MII-P5 (PHY mode MII); (6)IEEE 802.1q tag-based VLAN (16 VLANs, full-range VID) for DMZ port, WAN/LAN separation or inter-VLAN switch links; (7)VLAN ID tag/untag options, per-port basis; (8)Programmable rate limiting 0Mbps to 100Mbps, ingress and egress port, rate options for high and low priority, per-port-basis; (9)Flow control or drop packet rate limiting (ingress port); (10)Integrated MIB counters for fully compliant statistics gathering, 34 MIB counters per port.

Diagrams